We play with technology. Sometimes we discover things we think are worth sharing.
Tag: "axi"
VHDL
AXI Stream Protocol Editing
Example use of the 'AXI Edit' component to convert a protocol.
VHDL
AXI Stream General Edit
A general way of editing an AXI stream using actions: pass, swap, drop, insert and pause.
VHDL
AXI Data Stream Width Conversion
Example code to convert 16-bit data to 8-bits in an AXI Data Stream.
VHDL
Working With AXI Streaming Data
Beyond using Xilinx IP cores to work with AXI streaming data, one will always need to eventually write custom VHDL code. I've personally found working with AXI awkward and so I've put together some techniques.
FPGA
Deriving AXI Crossbar Address Maps
Some tips and tricks for correctly decoding an AXI crossbar address map.
FPGA
Interpreting The AXI Protocol Specification for Testing
Interpreting the ARM AMBA AXI protocol specification so that hardware components can be successfully created and tested.