We play with technology. Sometimes we discover things we think are worth sharing.

Tag: "xpm"

Implementing an AXI-Streaming delay pipeline when reading data from XPM RAM
FPGA

Implementing an AXI-Streaming delay pipeline when reading data from XPM RAM

A neat trick to take advantage of a pipelining opportunity with XPM RAM.
Dynamic Timing Check For A Standard Clock Domain Crossing Solution
VHDL

Dynamic Timing Check For A Standard Clock Domain Crossing Solution

This is a standard clock domain crossing solution however what is often overlooked in the implementation is the constraint that the inputs must remain stable long enough to be safely sampled by the destination clock domain. This requires a dynamic check…
Exploring Xilinx XPM Memory
FPGA

Exploring Xilinx XPM Memory

The XPM_MEMORY components from Xilinx offer lots of facilities, even having more generics than ports. This means that the generics values need to be tailored carefully to be compatible. Is there a more convenient abstraction that can be derived for…