We play with technology. Sometimes we discover things we think are worth sharing.
Tag: "adder"
VHDL
Radix-n Fast Fourier Transforms (Part 3)
FFTs are generally defined recursively, so how hard can it be to write a recursive VHDL implementation of an FFT that can scale to any number of inputs for any chosen radix?
VHDL
FIR Filter Implementation Comparisons
Having created the pipelined adder tree component, time to compare it with other implementations to see what value it adds.
VHDL
Adder Trees Pipelined Efficiently by Recursion
Amusing myself with recursive structures in HDL that are entirely synthesisable and optimal in both size and clock speed. This is primarily a hierarchical construction problem made interesting by having to copy with a non-balance tree.
