We play with technology. Sometimes we discover things we think are worth sharing.

Tag: "congestion"

Practical Control Set Reduction
FPGA

Practical Control Set Reduction

Checking that control set remapping delivers on the Xilinx promises.
Taking Xilinx's Advice on Reducing Routing Congestion
FPGA

Taking Xilinx's Advice on Reducing Routing Congestion

I've been faced with the situation where the tools fail to create an image that meets timing, complaining about routing congestion. Here are some anecdotes about trying to follow Xilinx's advice.