Technology Blogs

We play with technology. Sometimes we discover things we think are worth sharing.

Archives for: "October 2024"

Power Reduction using Vivado
FPGA

Power Reduction using Vivado

An attempt to reduce power consumption of a simple design using Vivado's 'power_opt_design'.
Script to compile Xilinx Primitives with Intel's FPGA Starter edition QuestaSim
FPGA

Script to compile Xilinx Primitives with Intel's FPGA Starter edition QuestaSim

Intel's FPGA Starter edition of QuestaSim no longer compiles the primitives for Xilinx's Vivado. Here's a batch file to achieve some of the same process.
Investigating Xilinx AXI IP and Registered Outputs
FPGA

Investigating Xilinx AXI IP and Registered Outputs

Investigating Xilinx AXI IP Cores, registered outputs and the AXI specification using equivalent components for the AXI stream split and join functions.