We play with technology. Sometimes we discover things we think are worth sharing.
Archives for: "June 2021"
FPGA
Deriving AXI Crossbar Address Maps
Some tips and tricks for correctly decoding an AXI crossbar address map.
FPGA
Resilient Xilinx Vivado Licence Acquisition
Our design team has recently observed that Vivado has been struggling to get a licence later into long running compilations. These are some of the ideas I have developed to try and monitor the problem and make our compilations resilient to licence…
FPGA
Automating Code Review Design Checks in Vivado
Automating checks for transparent latches, asynchronous resets, no resets in Xilinx's Vivado synthesis tool.
Garmin-ConnectIQ
Writing a simple Garmin app for my watch
I am going to be writing an app for my watch to control my family's amplifier.